Description
- 1.Stably support SignalTap II embedded logic analyzer function ,no mistake while crawlling data;
- 2.Fully support : CPLD: MAX3000, MAX7000, MAX9000 and MAXII FPGA: Stratix, StratixII, StratxIII, Cyclone, CycloneII, CycloneIII, ACEX1K, APEX20K and FLEX10K etc.
- Active serial configuration device: EPCS1, EPCS4, EPCS16, EPCS64 etc.
- Enhanced configuration devices: EPC1, EPC4.
- 3. Supports 3 download mode: AS, PS and JTAG;
- 4. Support and Nios II embedded soft core processor communication and debugging, Rev.C latest version Hardware. Support jtag_uart;